Building hardware architectures based on these nano-devices is therefore an interesting road to
fabricate more efficient specialized accelerators than could be done in CMOS, or implementing new functions that could not be
achieved with CMOS. In the long term, very large scale Hybrid CMOS/nanodevice architectures can also be envisioned.
To exploit to the best the unique properties of the multifunctional nanodevices, new,
device-specialized information processing paradigms have to be developed.
